1. Technical Field
This invention relates to an MPEG decoder and an MPEG decoding method, more particularly, to an MPEG decoder and an MPEG decoding method with two memory controllers capable of separately controlling compressed data and decoded data.
2. Description of the Related Arts
FIG. 1 shows a prior art of an MPEG decoder having one memory controller. As shown in FIG. 1, the MPEG decoder includes a CPU (central process unit) interface 130 which interfaces a CPU and a decoder 110; the decoder 110 for decoding compressed data; a local memory controller 120; a local memory interface 140 for interfacing the local memory controller 120 with an outer memory; and a display interface 150 for interfacing the decoder 110 and a display unit.
The operation of the MPEG decoder shown in FIG. 1 is as follows.
According to a control signal of the CPU, the decoder 110 receiving the compressed data from the CPU through the CPU interface 130, outputs a compressed data write request signal and the compressed data to the local memory controller 140. On the other hand, when the compressed data write request signal is inputted, the local memory controller 120 outputs a memory control signal, a memory address and memory data to the local memory interface 140 in order to store the compressed data in a local memory.
The decoder 110, which receives the decoding control signal from the CPU, sends a compressed data read request signal to the local memory controller 120 to read the compressed data stored in the local memory. On the other hand, when the compressed data read request signal is inputted to the local memory controller 120, the local memory controller 120 sends the memory control signal, the memory address and the memory data to the local memory interface 140. And then the local memory controller 120 reads the compressed data from the local memory and sends it to the decoder 110.
The decoder 110 receiving the compressed data from the local memory controller 120, outputs a decoded data read request signal to the local memory controller 120 to read the decoded data from the local memory. On the other hand, when the decoded data read request signal is inputted to the local memory controller 120, the local memory controller 120 sends the memory control signal, the memory address and the memory data to the local memory interface 140 in order to read the decoded data from the local memory interface and send it to the decoder 110.
On the other hand, the decoder 110 receiving the decoded data from the local memory controller 120, decodes the compressed data and then sends a decoded data write request signal and the decoded data to the local memory controller 120 to store it in the local memory. On the other hand, the decoded data write request signal is inputted, the local memory controller 120 sends the memory control signal, the memory address and the memory data to the local memory interface 140 to store the decoded data in the local memory.
The decoder 110 receiving a display control signal from the CPU, inputs a display data read request signal to the local memory controller to read the decoded data from the local memory and to send it to the display unit through the display interface 150. On the other hand, the display data write request signal is inputted from the decoder 110, the local memory controller 120 sends the memory control signal, the memory address and the memory data to the local memory interface 140 to read the decoded data from the local memory. The read data is sent to the decoder 110.
At this time, in case that the local memory is implemented by a dynamic RAM(DRAM), the decoder 110 must have a refresh function so that the decoder 110 generates a refresh request signal to the local memory controller 120 in order to perform the refresh operation. Since above described functions have a priority, the local memory is utilized by the priority.
FIG. 2 shows the flowchart of the MPEG decoder of the FIG. 1. As shown in FIG. 2, the MPEG decoding method utilizing the MPEG decoder with one memory controller is as follows.
In a standby state, when an outer signal is inputted, it is determined whether a reset signal is inputted or not (S202).
When the reset signal is inputted, the standby state is returned. Otherwise, it is determined whether a refresh operation is required or not (S203). In case that the refresh operation is required, the local memory is refreshed (204), and then the standby state is returned. In case that the refresh operation is not required, it is determined whether a frame read is required or not.
In case that the frame read is required, a display data read operation is performed (206), and then the standby state is returned. In case that the frame read is not required, it is determined whether a compressed data write is required (207). In case that the compressed data write is required, the compressed data write operation is performed (208), and then the standby state is returned. On the other hand, the compressed data write is not required, it is determined whether a compressed data read is necessary or not (209).
In case that the compressed data read is necessary, the compressed data read operation is performed (210), and then the standby state is returned. In case that the compressed data read is not necessary, it is determined a decoded data read is determined (211). In case that the decoded data read is required, the decoded data read operation is performed (212), and then the standby state is returned. In case that the decoded data read is not required, it is determined whether a decoded data write operation is required or not (213).
On the other hand, the decoded data write operation is required, the decoded data write operation is performed (214), and then the standby state is returned, and than the standby state is returned. In case that the decoded data write operation is not required, the standby state is returned. Since a common local memory is alternatively used according to the priority, in some applications, for example, an HDTV (High Definition Television), the local memory request is increased so that a memory control is complicated and there occurs a bottle neck phenomenon in a local memory access operation.
Therefore, the present invention is to provide an MPEG decoder and an MPEG decoding apparatus with two memory controllers capable of increasing the memory data sending ability and capable of having the architecture of the memory controller simple and easy by separately storing the compressed data and the decoded data.
According to the present invention, a decoder decoding a compressed input data formatted in an MPEG type, comprises a compressed data memory controller and a decoded memory controller. The compressed data memory controller is coupled to a compressed data memory and controls a compressed data. The decoded data memory controller is coupled to a decoded data memory and controls a decoded data.
A method of controlling a compressed data memory in accordance with present invention, comprises steps of: determining whether a reset signal is inputted or not when an outer signal is inputted in a standby state, to return to the standby state if the reset signal is inputted or to determine whether a refresh is required or not if the reset signal is not inputted; returning to the standby state after operating of the compressed data memory in case that refresh is necessary, and determining whether the compressed data write is necessary or not in case that the refresh is not required; returning to the standby state after performing the compressed data write operation, in case that the compressed data write operation is required, and determining whether the compressed data read operation is required or not, in case that said compressed data write operation is not required; and returning to the standby state after performing compressed data read in case that the compressed data read operation is required, and returning to the standby state in case that the compressed data read operation is not required.
A method of controlling a decoded data memory in accordance with present invention, comprises the steps of: determining whether a reset signal is inputted or not when an outer signal is inputted in a standby state, to return to the standby state if the reset signal is inputted or to determine whether a refresh is required or not if the reset signal is not inputted; returning to the standby state after operating of the compressed data memory in case that refresh is necessary, and determining whether a frame read is required or not in case that the refresh is not required; returning to the standby state after performing a display data read, in case that the frame read is required, and determining whether the decoded data read operation is required or not, in case that said frame read is not required; returning to the standby state after performing decoded data read in case that the decoded data read operation is required, and determining whether the decoded data write operation is required or not in case that the decoded data read operation is not required; and returning to the standby state after performing decoded data write in case that the decode data write operation is required, and returning to the standby state in case that the decoded data write operation is not required.
These and other features of the present invention are more fully shown and described in the drawings and detailed description of this invention. It is to be understood, however, that the description and drawings are for the purpose of illustration and should not be read in a manner that would unduly limit the scope of this invention.